Asynchronous datapaths and the design of an asynchronous adder
نویسندگان
چکیده
منابع مشابه
Asynchronous Datapaths and the Design of an Asynchronous Adder
This paper presents a general method for designing delay insen sitive datapath circuits Its emphasis is on the formal derivation of a circuit from its speci cation We discuss the properties re quired in a code that is used to transmit data asynchronously and we introduce such a code We introduce a general method in the form of a theorem for distributing the evaluation of a function over a numbe...
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Modern technological processes for producing VLSI circuits have created an opportunity to exploit the advantages of asynchronous circuits. Compared to their synchronous counterparts, asynchronous circuits have the potential for lower power consumption, offer greater design flexibility, exhibit average rather than worst-case performance and have no problem with clock skew [Lav93, Hauck95]. Async...
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A novel VLSI pipeline architecture for high-speed clockless computation is proposed. It features gate-level pipelining to maximize throughput and uses dynamic latches to keep the latency low. The most salient property is the asynchronous operation using a modi ed handshake protocol. Data words are accompanied by associated control signals resembling a local clock and propagate in coherent waves...
متن کاملThe Design of An Asynchronous Communications Chip
Asynchronous logic design is currently receiving much attention as an alternative to traditional synchronous design [2], [5], [6], [7], [8], [9], [13], [14]. Asynchronous designs do not use a global clock, simplifying global chip routing and eliminating problems due to clock skew. Furthermore, a large portion of a synchronous chip’s power budget is dedicated to driving the clock, whereas elimin...
متن کاملAsynchronous VLSI Design: An overview
An asynchronous circuit, or self-timed circuit, is a sequential digital logic circuit which is not enabled by a global clock signal. Instead of that, they often use signals that indicate completion of operations and instructions, specified by handshaking or simple data transfer protocols. This type is contrasted with a synchronous logic circuit where changes to the output signal values are trig...
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ژورنال
عنوان ژورنال: Formal Methods in System Design
سال: 1992
ISSN: 0925-9856,1572-8102
DOI: 10.1007/bf00464358